An unreleased AMD processor just surfaced out of nowhere, and it is not the chip anyone expected to see in October 2026. A sample labeled AMD Ryzen 9 5900X3D, carrying the internal identifier 100-000000652-20_48/32_Y, appeared in a post on the Chinese enthusiast forum Chiphell this week. The chip never shipped. AMD never announced it. Yet here it is, four years after the Zen 3 generation launched, with a cache configuration nobody has seen on a retail AM4 part.
According to reporting from Tom’s Hardware, the sample packs 12 cores and 24 threads, split across two CPU die complexes (CCDs), with a combined 128 MB of L3 cache. That is more total cache than AMD put on any Ryzen 5000-series chip it actually sold. The reported TDP sits at 105 W. Publication dates for the leak cluster around October 2 and October 3, 2026, depending on the outlet picking up the Chiphell post.
This is not a new AMD product launch. It is a window into a decision AMD made and then walked away from, and the timing of its resurfacing says as much about the AM4 platform’s stubborn relevance in 2026 as it does about Zen 3 engineering history.
What the Ryzen 9 5900X3D Sample Actually Shows
Strip away the speculation and the hard numbers from the leak are fairly specific. The chip reportedly carries the OPN (ordering part number) 100-000000652, a 12-core, 24-thread layout, and 128 MB of total L3 cache. Per the screenshots that circulated alongside the Chiphell post, that cache is not split evenly. One CCD reportedly carries 96 MB, built from 32 MB of native L3 plus a 64 MB 3D V-Cache die stacked on top. The second CCD reportedly carries a plain 32 MB, with no stacked cache at all.
That lopsided split matters because it mirrors, in miniature, the design AMD eventually shipped on later chips: cache on one CCD, none on the other, with the scheduler steering latency-sensitive threads to the stacked side. The difference is that AMD applied this idea to a 12-core Zen 3 part years before it became standard practice on Ryzen 9000X3D silicon. The sample was built for the AM4 socket and based on the Zen 3 architecture, according to the sources that examined it, and AMD never turned it into a retail product.
A few figures tied to this leak have not been corroborated by the stronger sources and deserve to be flagged as such. Outlet VGTimes reported a maximum boost clock near 4.85 GHz, with the sample observed running in the 4.65–4.73 GHz range, but those numbers were not confirmed by Tom’s Hardware or TechPowerUp. Separate secondary reporting has referenced even earlier Zen 3 X3D prototypes carrying 192 MB of total L3 cache, a figure that appears to trace back to AMD’s original 2021 3D V-Cache technology demo rather than to this specific 5900X3D sample. No retail price exists for the chip, and there is no on-record statement from AMD or a named AMD representative addressing the leak.
| Spec | Reported Value |
| Product name (unreleased) | AMD Ryzen 9 5900X3D |
| Sample ID | 100-000000652-20_48/32_Y |
| OPN / code | 100-000000652 |
| Cores / threads | 12 / 24 |
| Total L3 cache | 128 MB |
| CCD 1 cache | 96 MB (32 MB native + 64 MB 3D V-Cache) |
| CCD 2 cache | 32 MB (no stacked cache) |
| TDP | 105 W (reported in screenshots) |
| Architecture / platform | Zen 3 / AM4 |
| Retail status | Never released |
| Source of leak | Chiphell forum post |
Why AMD Never Shipped a 12-Core X3D Chip on Zen 3
AMD’s only retail 3D V-Cache product on Zen 3 was the Ryzen 7 5800X3D, an 8-core, single-CCD chip with 96 MB of total cache, launched in April 2022. AMD skipped X3D versions of the 12-core Ryzen 9 5900X and the 16-core Ryzen 9 5950X entirely. The newly surfaced sample suggests AMD at least built and tested a 12-core variant internally before deciding not to bring it to market.
The engineering logic for that decision is not hard to infer, even without an official AMD statement. Stacking 64 MB of SRAM on top of a single CCD in the first-generation 3D V-Cache process added thermal resistance, since the compute die now had another layer between it and the heatsink. AMD addressed that by capping the 5800X3D’s boost clocks slightly below the non-X3D 5800X. Doing the same thing across two CCDs, with only one of them stacked, would have created a chip with two cores clusters running at meaningfully different clock ceilings and different latency profiles, a scheduling problem that Windows and game engines in 2021-2022 were not well equipped to handle.
AMD did not fully solve asymmetric dual-CCD X3D scheduling until the Ryzen 9 7950X3D, launched February 28, 2023, on the AM5 platform with Zen 4 silicon and Windows updates specifically tuned to detect game processes and route them to the cache-heavy CCD. Shipping a 5900X3D on Zen 3, three generations earlier and without that scheduling groundwork, would have meant asking reviewers and buyers to deal with inconsistent gaming performance depending on which cores an application happened to land on. Scrapping the 12-core Zen 3 X3D part and waiting for AM5 to mature the technology looks, in hindsight, like the more disciplined call.
The 3D V-Cache Timeline, From Demo to 2026
Context helps explain why a four-year-old engineering sample is making headlines now. AMD first showed 3D V-Cache publicly on June 1, 2021, stacking 64 MB of SRAM on a Ryzen 9 5900X prototype to push total cache to 192 MB. That demo chip was never sold either, but it set the expectation that AMD would eventually bring stacked cache to its mainstream Ryzen lineup. AMD announced the Ryzen 7 5800X3D on January 4, 2022, and launched it April 20, 2022, as the first retail 3D V-Cache part, built on a single 8-core CCD with 96 MB total L3.
AMD moved to Zen 4 and the AM5 platform on September 27, 2022, and brought X3D to multi-CCD designs with the Ryzen 9 7950X3D and 7900X3D on February 28, 2023, followed by the Ryzen 7 7800X3D on April 6, 2023. The Zen 5 generation continued the pattern: the Ryzen 7 9800X3D launched November 7, 2024, with a revised design that places the 3D V-Cache die beneath the compute cores instead of on top, improving thermal transfer to the heatsink. The Ryzen 9 9950X3D and 9900X3D followed on March 12, 2025, extending multi-CCD X3D to 16-core and 12-core Zen 5 parts.
Seen against that timeline, the 5900X3D sample reads like a missing chapter. AMD tested the 12-core, dual-CCD, asymmetric-cache idea on Zen 3 and AM4, shelved it, then shipped a refined version of the same concept on AM5 almost a full generation later. The 3D V-Cache architecture itself has not changed in its basic premise since that 2021 demo: stack extra SRAM vertically to cut cache-miss latency without growing the die’s footprint on the substrate.
Market Impact: Why This Surfaces Now, in Late 2026
The timing is not random. AM4 remains one of the largest installed CPU bases on the planet, a socket AMD first introduced in 2017 and kept alive through five processor generations. Millions of gaming PCs still run on AM4 motherboards paired with DDR4 memory, and the Ryzen 7 5700X3D and 5800X3D continue to sell as drop-in upgrades for owners who do not want to replace a motherboard and buy new RAM. A 12-core X3D chip, had AMD released it in 2022, would have slotted above the 5800X3D as a halo part for that same upgrade crowd.
Cache has also become the most contested spec in desktop CPUs this year, which gives an old leak new relevance. AMD’s cache lead on Ryzen 9000X3D chips is the main reason Intel has been pushing its own large-cache designs for its upcoming Nova Lake generation, a rivalry covered in detail when Intel’s “BFC” cache approach surfaced as a direct answer to AMD’s X3D advantage. Separate Nova Lake engineering samples have also leaked with cache totals as high as 144 MB across 28 cores, a leak reported in detail in late September. Against that backdrop, evidence that AMD was experimenting with 128 MB cache configurations years before Intel’s current push adds weight to the argument that AMD’s cache strategy has deeper roots than its AM5 marketing suggests.
There is also a credibility angle. Leaks that resurface years-old engineering samples tend to travel fast on forums precisely because they are hard to fake and hard to verify at the same time. The site has previously covered how leak credibility gets tested in real time, including when a well-known leaker’s claims about next-generation GPU timing were directly contradicted by another source. Chiphell carries a mixed reputation among hardware enthusiasts: it has produced genuine engineering-sample leaks for both AMD and Intel in the past, but individual posts are not independently verified before they spread.
AMD’s Stock and Why an Old Chip Leak Still Moves the Conversation
AMD enters this story from a position of strength that it did not have back when the 5900X3D sample was reportedly built. The company has spent 2026 riding a run of data-center and AI chip wins, a stretch that helped push AMD past a $1 trillion market capitalization after a sharp rally, a run tracked in AMD’s own investor relations disclosures. A leak about a canceled consumer chip from 2021-2022 does not move that valuation, but it does feed the broader narrative that AMD’s engineering bench has been testing aggressive cache ideas for longer than its public roadmap lets on. Investors care about EPYC and AI accelerators first, yet stories like this shape how enthusiasts and reviewers frame AMD’s desktop strategy heading into whatever comes after the current Ryzen 9000 series.
Memory and Component Costs Complicate Any AM4 Revival
Even if AMD wanted to dust off a 12-core AM4 X3D design today, 2026’s memory and chip-pricing environment argues against it. DRAM pricing has climbed sharply this year, to the point where DRAM now costs more per unit than TSMC’s leading-edge 2nm logic silicon, a reversal that was unthinkable a few years ago. That squeeze hits older DDR4-based platforms like AM4 just as hard as it hits DDR5 systems, since fabs have been reallocating capacity toward higher-margin AI memory rather than legacy DDR4 lines. GPU pricing tells a similar story: desktop graphics cards have become dramatically harder to find at list price, with the RTX 5090 effectively vanishing from US retail and reselling near $9,500. A new CPU launch on a nine-year-old socket would be competing for fab capacity and consumer budget against a PC component market that is already under unusual strain.
AM4 vs AM5 in Late 2026: Does This Leak Change Anything?
No new product comes out of this leak, so the practical upgrade math for AM4 owners is unchanged. The Ryzen 7 5700X3D and Ryzen 7 5800X3D remain AMD’s only retail X3D options for AM4 boards. Buyers chasing the highest gaming performance available today are still better served looking at AM5, where current-generation 9000X3D chips carry the mature, scheduler-aware version of the same asymmetric-cache idea this sample hints at.
| Factor | AM4 Platform | AM5 Platform |
| CPU generations supported | Ryzen 1000 through 5000 (incl. 5800X3D) | Ryzen 7000, 8000G, 9000 and X3D variants |
| Memory standard | DDR4 | DDR5 |
| Highest retail X3D chip | Ryzen 7 5800X3D (8-core, 96 MB cache) | Ryzen 9 9950X3D (16-core, multi-CCD cache) |
| Platform age in 2026 | ~9 years since launch | ~4 years since launch |
| Forward upgrade path | None to next-gen Zen | Continues through current Ryzen releases |
| Typical buyer today | Existing owner doing a low-cost CPU swap | New build or buyer prioritizing longevity |
What the leak does change is perception. It is evidence that AMD’s cache strategy on AM5 was not improvised, it was a continuation of work that started on a socket AMD has now supported for roughly nine years. That kind of long tail support has drawn comparisons to how AMD stretched value out of AM4 well past when most manufacturers would have moved on, letting 5700X3D and 5800X3D buyers upgrade without touching a motherboard or memory kit, while still pushing new buyers toward AM5 for anything built around current-generation performance.
Competitive Comparison: AMD’s Cache Lead vs Intel’s Response
AMD’s 3D V-Cache approach has gone unanswered by Intel for most of the last four years, and that gap shaped a lot of the desktop CPU market’s gaming benchmarks between 2022 and 2026. Intel’s answer has been slower to arrive and architecturally different: rather than stacking SRAM vertically, Nova Lake’s leaked “BFC” cache design reportedly grows cache through a different die arrangement, aiming to close the gap without licensing AMD’s stacking approach. Whether that catches up to AMD’s current 9950X3D and 9900X3D chips in real game benchmarks is still unverified ahead of Nova Lake’s retail launch.
The 5900X3D sample adds a data point to that race by showing AMD was willing to push cache totals to 128 MB on a mainstream 12-core part years before either company’s current flagship cache wars. It also underscores that AMD’s caution about shipping asymmetric multi-CCD designs was not about the cache technology itself, since the cache-heavy CCD clearly worked well enough to leak in a usable sample. The holdup was almost certainly scheduling software and platform maturity, both of which AMD solved on AM5 rather than trying to retrofit onto AM4’s older chipset and driver stack.
Historical Context: AMD’s Pattern of Leaked Prototypes
This is not the first time a canceled AMD sample has shown up years after the fact. AMD’s broader Zen 3 architecture, which underpins the Ryzen 5000 series, spawned a number of internal variants that never reached shelves, including engineering configurations explored for OEM and server channels before AMD settled on the final Ryzen 5000 desktop stack. Chiphell specifically has a long track record of surfacing AMD and Intel engineering samples months or years ahead of, or well after, their relevant product cycles, sourced from Chinese supply-chain and refurbishment channels that handle decommissioned test hardware. Tom’s Hardware and TechPowerUp both treat Chiphell as a credible-but-unofficial source for this reason: the hardware itself is usually genuine, even when the story behind why a particular chip was shelved has to be pieced together after the fact.
What’s Confirmed and What Isn’t: A Fact Check
Separating verified detail from speculation matters here, because leaks like this tend to accumulate extra claims as they spread across outlets. What is consistently reported across Tom’s Hardware and TechPowerUp: the 12-core, 24-thread configuration, the 128 MB total cache figure, the 96 MB/32 MB CCD split, the 105 W TDP shown in screenshots, and the Zen 3/AM4 platform basis. What is not confirmed: the exact clock speeds (VGTimes’ 4.85 GHz figure stands alone), any AMD statement about why the chip was canceled, any retail pricing, and any confirmation that the 192 MB cache figure tied to earlier 2021 prototypes applies to this specific sample rather than to AMD’s original public 3D V-Cache demo chip.
What Happens to the Sample Now
Engineering samples like this one almost never reach consumers. They are typically internal validation units, pulled from AMD’s labs or a partner’s test bench, and when they leak it is usually because an employee, tester, or refurbisher sold or passed along hardware that should have been destroyed. AMD has a long history of engineering samples from canceled or shelved projects surfacing years later on forums like Chiphell, and the company has rarely commented on individual leaks of this kind.
There is no indication in current reporting that AMD plans to revisit a 12-core AM4 X3D product, and given that AM5 has fully absorbed AMD’s current X3D roadmap, there is little commercial reason to do so. The chip’s value at this point is historical: it documents an intermediate step in how AMD got from the single-CCD 5800X3D to the scheduler-aware, multi-CCD 9950X3D, rather than a preview of anything coming to retail.
Predictions: Where This Story Goes From Here
- More Chiphell-sourced screenshots or benchmark runs of the same 5900X3D sample are likely to surface over the next few weeks, since leaks of this kind rarely stop at a single forum post.
- AMD is unlikely to issue any official statement confirming or denying details of a nine-year-old socket’s canceled engineering sample, consistent with its pattern on past AM4 leaks.
- Expect renewed comparisons between this sample and AMD’s current 9000X3D lineup as outlets use it to frame how far asymmetric-cache scheduling has matured since 2022.
- Intel’s Nova Lake cache leaks will likely keep surfacing alongside AMD retrospectives like this one, as both companies’ 2026-2027 cache roadmaps get picked apart by the same leak communities.
- Collector interest in genuine AM4 X3D engineering samples, if any reach resale markets, will probably stay a niche curiosity rather than a mainstream story, similar to how earlier canceled Zen samples have traded quietly among collectors rather than driving broader coverage.
The Bigger Picture for AM4 Owners
If you are still running an AM4 system in October 2026, this leak changes nothing about your actual upgrade options. The Ryzen 7 5800X3D and 5700X3D remain the ceiling for socket AM4 gaming performance, and that is not going to change based on a four-year-old sample that AMD chose not to productize. What the leak does offer is a clearer picture of how AMD arrived at its current cache strategy, and a reminder that the chips sold at retail are often just one branch of a much larger tree of prototypes that never leave the lab.
For buyers weighing a new build today, the practical advice has not shifted either. AM5 remains the platform with an active upgrade path, current memory standards, and the fully realized version of the cache technology this sample was testing. AM4 remains a value play for existing owners, not a platform to build fresh around in 2026.
Frequently Asked Questions
Is the AMD Ryzen 9 5900X3D a real, purchasable product?
No. It is an unreleased engineering sample that surfaced on the Chiphell forum. AMD never announced or sold a Ryzen 9 5900X3D at retail.
How much cache does the leaked sample have?
Reports from Tom’s Hardware and TechPowerUp put the total at 128 MB of L3 cache, split as 96 MB on one CCD (32 MB native plus 64 MB of 3D V-Cache) and 32 MB on the other.
What platform and architecture does the sample use?
It is reportedly based on the Zen 3 architecture and built for the AM4 socket, the same platform used by the retail Ryzen 5000 series.
Why didn’t AMD release a 12-core X3D chip on AM4?
AMD has not given an official reason. The most likely explanation, based on how AMD later handled multi-CCD X3D designs on AM5, is that asymmetric cache and clock behavior across two CCDs needed scheduling software AMD had not yet built for Zen 3 and Windows at the time.
Is the reported 4.85 GHz clock speed confirmed?
No. That figure, along with an observed 4.65–4.73 GHz operating range, comes from outlet VGTimes and was not corroborated by the stronger sources covering this leak.
Does this leak affect current AM4 upgrade options?
No. The Ryzen 7 5700X3D and Ryzen 7 5800X3D remain the only retail X3D chips for AM4, and that is unchanged by this sample.
How does this compare to AMD’s current Ryzen 9000X3D chips?
The current Ryzen 9 9950X3D and 9900X3D use a refined, scheduler-aware version of the same asymmetric multi-CCD cache idea, built on Zen 5 and AM5 rather than Zen 3 and AM4.
Could AMD still release this chip?
Nothing in current reporting suggests AMD has plans to bring a 12-core AM4 X3D chip to retail. With AM5 now covering AMD’s full X3D lineup, there is little commercial incentive to revisit a nine-year-old socket for a new SKU.
